TIC is the single timing authority for a Series One system: a pure, straight master clock. One master phase accumulator drives every output, so 16TH, 8TH, QTR and BAR all lock to the same grid, with a pulse LED on every output.

Swing is deliberately not built in. Swing, drift and drop live in their own modifier modules, so the master stays clean and everything downstream locks to the same timing source.

Controls and patching

• TEMPO — 30–300 BPM, exponential taper. No CV input: a master clock is set, not modulated.
• INT / EXT — EXT syncs to EXT CLK; INT runs on the internal tempo (default INT).
• EXT CLK in — 16th-note pulses only. Each rising edge snaps phase to the nearest 16th and the measured interval sets the rate. If the pulses stop, TIC falls back to the internal tempo after 2.5 periods. The EXT LED lights only while actually synced.
• RESET in — rising edge resets phase to beat 1.
• RUN IN — high runs, low stops. A patched cable overrides the RUN button, including a connected 0 V; unpatched, the saved RUN button state rules.
• TAP — tap tempo. Averages the last 4 valid intervals (300 ms–2 s window), writes the tapped tempo into TEMPO and resets phase.
• Outputs — 16TH, 8TH, QTR and BAR are 2 ms, 5 V pulses; RUN is a +5 V level while the transport is running. Step 0 after a reset is the downbeat: all outputs fire together.